Serial protocols
Introduced| English | Meaning |
|---|---|
| UART | A universal asynchronous receiver-transmitter that frames serial data using start and stop bits without a separate shared clock line. |
| SPI | A synchronous serial peripheral interface using a clock and separate data lines, with device selection controlled by the host. |
| I2C | An addressed serial bus using shared serial-data and serial-clock lines. |
| baud rate | Symbols transmitted per second; in the binary UART examples, one symbol carries one bit. |
Three wires or fewer
- The node's readings leave the chip through three wires or fewer. A console, a temperature sensor and a flash chip each need a link.
- UART, SPI and I2C are the usual choices. Each one trades speed against wires, and simple arithmetic decides between them.
UART: no shared clock
- UART 通用异步收发器 sends bytes with no clock line. Each byte is a start bit, 8 data bits and a stop bit (8N1), sent least significant bit first.
- Both ends agree a baud rate 波特率 and time each bit themselves. A byte takes $T_{\text{byte}} = \dfrac{10}{\text{baud}}$.
At 115 200 baud, 8N1, one byte takes
Difficulty 1/5 · 100 coins + a small bonus on first completion today
8N1 is 10 bits per byte, and $10/115\,200 = 86.8$ µs. The start and stop bits are part of the price.
The UART sends 0x41 (0100 0001), least significant bit first. Which data bits follow the start bit?
Difficulty 1/5 · 100 coins + a small bonus on first completion today
Read 0100 0001 from the right-hand end. Bit 0 is 1, bits 1 to 5 are 0, bit 6 is 1 and bit 7 is 0.
SPI: the clock is the speed
- SPI 串行外设接口 shares a clock. The master drives SCLK and a chip-select line; data goes out on MOSI and in on MISO at the same time.
- One bit per clock, so a byte takes about $8/f_{\text{SCLK}}$. The price is one chip-select wire per device.
I2C: two wires for the board
- I2C 集成电路总线 uses two wires: SDA for data and SCL for clock. Each device has a 7-bit address, and the bus allows up to 112 of them.
- The lines are open-drain: any device can pull a line low, and a resistor pulls it high again.
Worked example: sizing UART
- At 115 200 baud, 8N1 carries $115\,200/10 = 11\,520$ bytes a second; one byte takes 86.8 µs.
- In a 1 ms control loop, 11 bytes fit. A blocking 100-byte burst takes 8.68 ms and breaks that loop budget: split it or raise the baud.
Eight useful bits occupy ten bit times
$T_{frame}=10/B_t,\quad t_{sample,i}=(1.5+i)/B_r,\quad t_{stop}=9.5/B_r$
Start with the worked 115200-baud link and a repeated 0x41 byte. Read the start, least-significant-first data and stop cells; a 100-byte burst occupies 8.68 ms, while only 11 complete frames fit in 1 ms. Change the receiver baud to move its sampling points and distinguish wrong data, a low stop sample and a sample exactly on a transition.
A UART runs at 9600 baud, 8N1. How many bytes a second can it carry?
Difficulty 2/5 · 140 coins + a small bonus on first completion today
Ten bit times per byte: $9600/10 = 960$ bytes a second.
At 115 200 baud, 8N1, how long does a 50-byte message take, in ms? Give 2 decimal places.
Difficulty 2/5 · 140 coins + a small bonus on first completion today
$50 \times 10 / 115\,200 = 4.34$ ms, four control loops of 1 ms each.
Worked example: the three-way price
- SPI at 10 MHz sends a byte in 0.8 µs, about 108 times faster than the UART above. I2C at 400 kHz needs at least 22.5 µs for 8 data bits plus the ACK clock; address, start and stop add overhead.
- Sensor on I2C, flash on SPI, console on UART: each choice is priced by this arithmetic.
Compare SPI at 10 MHz with UART at 115 200 baud. SPI sends a byte about
Difficulty 1/5 · 100 coins + a small bonus on first completion today
86.8 µs / 0.8 µs ≈ 108. The clock line is the speed; the wire per device is the price.
Match each protocol to its wiring.
Difficulty 2/5 · 140 coins + a small bonus on first completion today
The wiring sets the speed and the cost, so it is the first thing to compare.
Three common slips
- Mismatched baud. Frames still arrive, but the bytes are garbage. Work out the divisor from the peripheral clock, not the core clock.
- 7-bit or 8-bit address? The 7-bit address plus the read/write bit makes one byte, and datasheets quote both forms.
- Wrong SPI mode. Clock polarity and phase must match the device, or every byte is off by one bit.
A sensor's 7-bit I2C address is 0x48. What address byte does the master send to write to it?
Difficulty 1/5 · 100 coins + a small bonus on first completion today
The 7 address bits move up one place and the read/write bit (0 for write) fills bit 0: 0x48 × 2 = 0x90. A read uses 0x91.
Recap
- UART: 10 bit times per byte, no clock, both ends agree the baud.
- SPI: one bit per clock, one wire per device.
- I2C: two wires, 7-bit addresses, open-drain.